--- v2.4.21/arch/i386/kernel/speedstep.c	2003-06-11 10:50:46.000000000 +0200
+++ linux/arch/i386/kernel/speedstep.c	2003-06-08 14:09:34.000000000 +0200
@@ -42,6 +42,7 @@
 
 #define SPEEDSTEP_CHIPSET_ICH2M         0x00000002
 #define SPEEDSTEP_CHIPSET_ICH3M         0x00000003
+#define SPEEDSTEP_CHIPSET_ICH4M         0x00000004
 
 
 /* speedstep_processor
@@ -108,6 +109,7 @@
 	switch (speedstep_chipset) {
 	case SPEEDSTEP_CHIPSET_ICH2M:
 	case SPEEDSTEP_CHIPSET_ICH3M:
+	case SPEEDSTEP_CHIPSET_ICH4M:
 		/* get PMBASE */
 		pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
 		if (!(pmbase & 0x01))
@@ -168,6 +170,7 @@
 	switch (speedstep_chipset) {
 	case SPEEDSTEP_CHIPSET_ICH2M:
 	case SPEEDSTEP_CHIPSET_ICH3M:
+	case SPEEDSTEP_CHIPSET_ICH4M:
 		/* get PMBASE */
 		pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
 		if (!(pmbase & 0x01))
@@ -247,6 +250,7 @@
 	switch (speedstep_chipset) {
 	case SPEEDSTEP_CHIPSET_ICH2M:
 	case SPEEDSTEP_CHIPSET_ICH3M:
+	case SPEEDSTEP_CHIPSET_ICH4M:
 	{
 		u16             value = 0;
 
@@ -278,6 +282,14 @@
  */
 static unsigned int speedstep_detect_chipset (void)
 {
+        speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL,
+                              PCI_DEVICE_ID_INTEL_82801DB_12,
+                              PCI_ANY_ID,
+                              PCI_ANY_ID,
+                              NULL);
+        if (speedstep_chipset_dev)
+                return SPEEDSTEP_CHIPSET_ICH4M;
+
 	speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL,
 			      PCI_DEVICE_ID_INTEL_82801CA_12, 
 			      PCI_ANY_ID,
